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| 1/12 www.rohm.com 2011.05 - rev.c ? 2011 rohm co., ltd. all rights reserved. power management ics for automotive body control led indicator driver BD8105FV description the BD8105FV is a serial parallel control led driver with 35v input voltage rating. responding to the 3-line serial data, it turns the 12ch open drain output on/off. due to its compact size, it is optimal for small spaces. features 1) open drain output 2) 3-line serial control + enable signal 3) internal temperature protection circuit (tsd) 4) cascade connection compatible 5) ssop-b20w 6) internal 12 ch power transistor ? applications these ics can be used with car and consumer electronic. absolute ma ximum ratings (ta=25 ) parameter symbol ratings unit power supply voltage vcc 7 v output voltage(pin no : 4 9, 11 16) vdmax 35 v input voltage(pin no : 1, 2, 3, 17, 18) vin -0.3 vcc v power dissipation pd 1187* mw operating temperature range topr -40 +105 storage temperature range tstg -55 +150 drive current (dc) iomaxd 50 ma drive current(pulse) iomaxp 150** ma junction temperature tjmax 150 * pd decreased at 9.50mw/ for temperatures above ta=25 ,mounted on 70701.6mm glass-epoxy pcb. ** do not however exceed pd. time to impress Q 200msec no.11039ect01
BD8105FV technical note 2/12 www.rohm.com 2011.05 - rev.c ? 2011 rohm co., ltd. all rights reserved. operational conditions (ta=-40~105 ) parameter symbol ratings unit min. typ. max. power supply voltage vcc 4.5 5 5.5 v drive current io - 20 40 ma * this product is not designed for protection against radioactive rays. electrical characteristics (unless specified, ta=-40~105 vcc=4.5 5.5v) parameter symbol limits unit conditions min. typ. max. output d0 d11 (pin no : 4 9, 11 16) on resistor ron - 6 12 ? i d =20ma output leakage current idl - 0 5 a v d =34v logic input (pin no : 1, 2, 3, 17, 18) upper limit threshold voltage vth vcc 0.8 - - v bottom limit threshold voltage vtl - - vcc 0.2 v serial clock frequency fclk - - 1 mhz input current iin 20 50 100 a vin=5v input leakage current iinl - 0 5 a vin=0v whole circuit current icc - 0.3 5 ma serial data input, vcc=5v,clk=500khz, serout=open static current istn - 0 50 a rst_b=open, serout=open ser out (pin no. : 20) output voltage high voh 4.6 4.8 - v vcc=5v, iso=-5ma output voltage low vol - 0.2 0.4 v vcc=5v, iso=5ma * this product is not designed for protection against radioactive rays. BD8105FV technical note 3/12 www.rohm.com 2011.05 - rev.c ? 2011 rohm co., ltd. all rights reserved. electrical characteristic diagrams (unless otherwise specified ta=25 ) 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -40 -15 10 35 60 85 ambient temperature ta[] output voltage voh[v] 4.5v 5v 5.5v 0 1 2 3 4 5 6 7 8 -40 -15 10 35 60 85 ambient temperature ta[] outpu t on re sistance ron[] 4.5v 5.5v 5v fig.6 serout high side voltage 1 (at iso=-5ma) 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4 4.5 4.7 4.9 5.1 5.3 5.5 supply voltage vcc[v] output voltage voh[v] -40 105 25 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 -40 -15 10 35 60 85 ambient temperature ta[] output voltage vol[v] 5.5v 4.5v 5v 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 4.5 4.7 4.9 5.1 5.3 5.5 supply voltage vcc[v] output voltage vol[v] -40 25 105 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 5.8 6.0 10 20 30 40 50 input current i d [ma] output on resistance ron[] 5.5 v 4.5v 5 v 205 210 215 220 225 230 -40 -15 10 35 60 85 ambient temperature ta[] supply currenticc[a] 5.5v 5.0v 4.5v 0 50 100 150 200 250 012345 supply voltagevcc[v] supply currenticc[a] 105 25 -40 fig.1 circuit current 1 fig.4 dxx on resistance 2 (at idd=20ma) fig.5 dxx on resistance fig.7 serout high side voltage 2 (at iso=-5ma) fig.2 circuit current 2 fig.3 dxx on resistance 1 (at idd=20ma) 0 1 2 3 4 5 6 7 8 9 10 4.5 4.7 4.9 5.1 5.3 5.5 supplyvoltagevcc[v] output resistanceron[] 105 25 -40 fig.8 serout low side voltage 1 (at iso=5ma) fig.9 serout low side voltage 2 (at iso=5ma) BD8105FV technical note 4/12 www.rohm.com 2011.05 - rev.c ? 2011 rohm co., ltd. all rights reserved. serial i/f driver tsd d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 sdwn serin latch clk rst_b serout <11:0> <11:0> <11:0> <11:0> vcc 19 2 18 17 3 4 5 6 7 1 8 9 11 12 13 14 15 16 20 10 gnd serout block diagram fig.10 pin setup diagram terminal number ? terminal name BD8105FV(ssop-b20w) fig.11 pin number terminal name function 1 latch latch signal input terminal (h: latches data) 2 rst_b reset reversal input terminal (l: ff data 0) 3 sdwn shutdown input terminal (h: output off) 4 d11 drain output terminal 11 5 d10 drain output terminal 10 6 d9 drain output terminal 9 7 d8 drain output terminal 8 8 d7 drain output terminal 7 9 d6 drain output terminal 6 10 gnd ground terminal 11 d5 drain output terminal 5 12 d4 drain output terminal 4 13 d3 drain output terminal 3 14 d2 drain output terminal 2 15 d1 drain output terminal 1 16 d0 drain output terminal 0 17 serin serial da ta input terminal 18 clk clock input terminal 19 vcc supply voltage input terminal 20 serout serial data output terminal serout vcc clk serin d0 d1 d2 d3 d4 latch 1 2 3 4 5 6 7 8 9 rst _ b sdwn d 11 d 10 d 9 d 8 d 7 d6 d 5 10 gnd 20 19 18 17 16 15 14 13 12 11 BD8105FV technical note 5/12 www.rohm.com 2011.05 - rev.c ? 2011 rohm co., ltd. all rights reserved. block operation 1)serial i/f the i/f is a 3-line serial (latch, clk, serin) style. 12-bit output on/off can be set-up. this is co mposed of shift register. + 12-bit register. 2)driver it is a 12-bit open drain output. 3)tsd (thermal shut down) to prevent heat damage and overh eating, when the chip temperat ure goes over approximately 175 , the output turns off. when the temperature goes back down, normal operation re sumes. however, the int ended use of the temperature protection circuit is to protect the ic, so please construc t thermal design with the junction temperature tjmax under 150. application circuit if= fig.12 vcc 10uf 10uf vbat vcc micro- computer rres vcc sdwn latch rst_b clk serin serout gnd d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d11 d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d11 vcc sdwn latch rst_b clk serin serout gnd if vf 10uf vbat - vf rres + ron BD8105FV technical note 6/12 www.rohm.com 2011.05 - rev.c ? 2011 rohm co., ltd. all rights reserved. shift register register clk serin latch driver 12bit 12bit serial communication the serial i/f is composed of a shift register which changes the clk and serin serial signals to parallel signals, and a register to remember those signals with a latch signal. the registers are reset by applying a voltage under vcc 0.2 to the rst_b terminal or opening it, and d11~d0 become open. to prevent erroneous led lig hting, please apply voltage under vcc 0.2 to rst_b or make it open during start-up. fig.13 1)serial communication timing the 12-bit serial data input from serin is taken into the shift register by the rise edge of the clk signal, and is recorded in the register by the rise edge of the latch signal. the re corded data is valid until the next rise edge of the latch signal. 2)serial communication data the serial data input configuration of serin terminal is shown below: first last d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 data terminal name output status data d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 d11 on 1* * ********* off 0* * ********* d10 on *1 * ********* off *0 * ********* d9 on ** 1 ********* off ** 0 ********* d8 on ** * 1******** off ** * 0******** d7 on ** * *1******* off ** * *0******* d6 on ** * **1****** off ** * **0****** d5 on ** * ***1***** off ** * ***0***** d4 on ** * ****1**** off ** * ****0**** d3 on ** * *****1*** off ** * *****0*** d2 on ** * ******1** off ** * ******0** d1 on ** * *******1* off ** * *******0* d0 on ** * ********1 off ** * ********0 * represents ?don?t care?. BD8105FV technical note 7/12 www.rohm.com 2011.05 - rev.c ? 2011 rohm co., ltd. all rights reserved. 3)enable signal by applying voltage at least vcc 0.8 or more to the sdwn terminal, d0 (16 pin)~d11 (4 pin) become open forcibly. at this time, the temperature protection circuit (tsd) stops. d11 d0 become pwm operation by inputting pwm to sdwn(3 pin). 4)serout a cascade connection can be made (connecting at least 2 or more ic?s in serial). serial signal input from serin is transferred into receiver ic by the fall edge of the clk signal. since this functionality gives enough margins for the setup time prior to the rise edge of the clk signal on the receiver ic (using the exact same clk signal of sender ic), the application reliability can be improved as cascade connection functionality. fig.14 cascade connection by using (at least) 2 ics, each ic?s d11~d0, at (at least) 24c h, can be controlled by the 24-bit serin signal. the serial data input to the sender ic can be transferred to the re ceiver ic by inputting 12clk to the clk terminal. send side ic receive side ic fig.15 latch clk serin d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 1 2 3 4 5 6 7 8 9 10 11 12 serout 13 d11 l atch clk serin d23 d22 d21 d20 d19 d18 d17 d16 d15 d14 d13 d12 1 2 3 4 5 6 7 8 9 10 11 12 13 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 14 15 16 17 18 19 20 21 22 23 24 d0 BD8105FV technical note 8/12 www.rohm.com 2011.05 - rev.c ? 2011 rohm co., ltd. all rights reserved. input signal?s timing chart fig.16 input signal?s timing rule(ta=-40 105 vcc=4.5 5.5v) parameter symbol min unit clk period tck 1000 ns clk high pulse width tckh 480 ns clk low pulse width tckl 480 ns serin high and low pulse width tsew 980 ns serin setup time prior to clk rise tsest 150 ns serin hold time after clk fall tsehd 150 ns latch high pulse time tlah 480 ns last clk rise to latch rise tladz 250 ns clk serin latch t ckl t sest t ckh t sehd t ladz t lah t ck 50% t sew 50% 50% BD8105FV technical note 9/12 www.rohm.com 2011.05 - rev.c ? 2011 rohm co., ltd. all rights reserved. output signal?s delay chart fig.17 output signal?s delay time(ta=-40 105 vcc=4.5 5.5v) parameter symbol max unit sdwn switching time(l h) tdsnh 300 ns sdwn switching time(h l) tdsnl 300 ns latch switching delay time tdlah 300 ns serout propagation delay time(l h) tdsoh 350 ns serout propagation delay time (h l) tdsol 350 ns t dsnl 50% 50% 50% 50% 50% 50% t dlah sdwn output (d11 d0) latch output (d11 d0) clk t dsnh t dsoh t dsol serout BD8105FV technical note 10/12 www.rohm.com 2011.05 - rev.c ? 2011 rohm co., ltd. all rights reserved. 100k (typ) vcc input/output equivalent circuit(pin name) 1pin(latch) 2pin(rst_b) 3pin(sdwn) 17pin(serin) 18pin(clk) 4pin(d11),5pin(d10) 6pin(d9),7pin(d8) 8pin(d7),9pin(d6) 11pin(d5),12pin(d4) 13pin(d3),14pin(d2) 15pin(d1),16pin(d0) 20pin(serout) fig.18 vcc vcc BD8105FV technical note 11/12 www.rohm.com 2011.05 - rev.c ? 2011 rohm co., ltd. all rights reserved. notes for use (1) absolute maximum ratings use of the ic in excess of absolute maximum ratings such as the applied voltage or op erating temperature range may result in ic damage. assumptions should not be made regardin g the state of the ic (short mode or open mode) when such damage is suffered. a physical safety measure such as a fuse should be implemented when use of the ic in a special mode where the absolute maximum ratings may be exceeded is anticipated. (2) reverse connection of a power supply connector if the connector of power is wrong connected, it may result in ic breakage. in order to prevent the breakage from the wrong connection, the diode should be connected between external power and the power terminal of ic as protection solution. (3) gnd potential ensure a minimum gnd pin potentia l in all operating conditions. (4) setting of heat use a setting of heat that allows for a sufficient margin in li ght of the power dissipation (pd) in actual operating conditions . (5) pin short and mistake fitting use caution when orienting and positioning the ic for mounting on printed circuit boards. improper mounting may result in damage to the ic. use of the ic in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in ic damage. (6) actions in strong magnetic field use caution when using the ic in the presence of a strong electr omagnetic field as doing so may cause the ic to malfunction. (7) thermal shutdown circuit(tsd) this ic built-in a thermal shutdown circuit (tsd circuit). if chip temperature becomes 175 (typ.), make the output an open state. eventually, warmly clearing the circuit is decide d by the condition of whether the heat excesses over the assigned limit, resulting the cutoff of the circuit of ic, and not by the purpose of preventing and ensuring the ic. therefore, the warm switch-off should not be applied in the premise of continuous employing and operation after the circuit is switched on. (8) testing on application boards when testing the ic on an application boar d, connecting a capacitor to a pin with low impedance subjects the ic to stress. always discharge capacitors after each process or step. ground the ic during assembly steps as an antistatic measure, and use similar caution when transporting or st oring the ic. always turn the ic's power supply off before connecting it to or removing it from a jig or fixture during the inspection process (9) ic terminal input this monolithic ic contains p+ isolation and p substrate layers between adjacent el ements in order to keep them isolated. p/n junctions are formed at the intersecti on of these p layers with the n layers of other elements to create a variety of parasitic elements. for example, when a resistor and tr ansistor are connected to pins. (see the chart below.) ? the p/n junction functions as a parasitic diode when gnd > (pin a) for the resistor or g nd > (pin b) for the transistor (npn). ? similarly, when gnd > (pin b) for the transistor (npn), t he parasitic diode described above combines with the n layer of other adjacent elements to operate as a parasitic npn transistor. the formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable resul t of the ic's architecture. the operation of parasitic elements c an cause interference with circuit operation as well as ic malfunction and damage. for these reasons, it is necessary to use caution so that the ic is not used in a way that will trigger the operation of parasitic elements, such as by th e application of voltages lowe r than the gnd (pcb) voltage to input pins. (10) ground wiring patterns when using both small signal and large current gnd pattern s, it is recommended to isolate the two ground patterns, placing a single ground point at the application's referenc e po int so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. be careful not to change the gnd wiring patterns of any external components. (pin a) gnd n p n n p+ p+ resistor parasitic elements p parasitic elements ( pin b ) gnd c b e parasitic elements gnd ( pin a ) gnd n p n n p+ p+ parasitic elements p substrate ( pin b ) c b e transistor (npn) n gnd BD8105FV technical note 12/12 www.rohm.com 2011.05 - rev.c ? 2011 rohm co., ltd. all rights reserved. ordering part number b d 8 1 0 5 f v - e 2 part no. part no. package fv: ssop-b20w packaging and forming specification e2: embossed tape and reel ? order quantity needs to be multiple of the minimum quantity. r1120 a www.rohm.com ? 2011 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specied herein is subject to change for improvement without notice. the content specied herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specied in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specied herein is intended only to show the typical functions of and examples of application circuits for the produc ts. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specied in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any product, such as derating, redundancy, re control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specied herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law. |
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